1. Field of the Invention
The Invention is directed to the field of superconducting circuits, and, more particularly, to the field of single flux quantum (SFQ) to DC drivers for interfacing Rapid Superconducting Single Flux Quantum (RSFQ) circuits to semiconductor circuits.
2. Description of the Prior Art
Ultrafast superconducting digital circuits are based on Josephson junctions integrated together according to RSFQ Logic (Rapid-single-flux-quantum), first proposed by K. Likharev and V. Semenov (1991). This is also a low-voltage technology, with fast voltage pulses 4 picoseconds wide and 0.5 mV in amplitude. In order to transmit the digital information to conventional semiconductor circuits, several stages of amplification are needed. The non-inverting transimpedance digital amplifier popularly known as SFQ-to-DC converter (FIG. 1) is well established in the prior art (ref: RSFQ Logic/Memory Family: A New Josephson-Junction Technology for Sub-Terahertz-Clock-Frequency Digital Systems by K. Likharev and V. Semenov (1991)) as a low-speed output device for high-speed RSFQ digital test circuits. This low-speed limit is not because the non-inverting transimpedance digital amplifier is slow (actually, it is known to be very fast), but rather because its output voltage for earlier fabrication technology was limited to about 0.2 mV. For a high-speed output device that can interface with conventional broadband semiconductor amplifiers, amplitude of at least 1 mV is necessary. Conventionally, it was impossible to bridge this gap, so an alternative output technology was needed. One such technology based on series arrays of SQUID amplifiers was recently developed by A. Inamdar and S. Rylov (Pending U.S. patent application Ser. No. 11/705,351, filed Feb. 12, 2007, entitled Superconducting Switching Amplifier), with mV output at GHz rates.
FIG. 3 of this application is a block diagram of a superconductive switching amplifier based on SQUID stacks as described in FIG. 4 of that application. In response to a given input signal, complementary control signals are generated and coupled to the first and second set of SQUID stacks for raising the critical currents of the devices of one set while decreasing the critical current of the devices in the other set, whereby for one input signal condition the voltage on the first line is clamped via the low (zero) impedance of one set to the output terminal and for another input signal condition the voltage on the second voltage line is clamped via the low (zero) impedance of the other set to the output terminal. The output voltage is taken across the load resistor RL. RL is connected to a common terminal having a value between the voltages applied to the respective SQUID stacks.
A number of techniques have been utilized in the prior art for interfacing RSFQ circuits to room temperature electronics. In an article in the IEEE Transactions on Applied Superconductivity, Volume 7, No. 2, June 1997, entitled “Josephson Output Interfaces for RSFQ Circuits”, by O. Mukhanov, S. Rylov, D. Gaidarenko, N. Dubash and V. Borzenets, the authors discussed development of high bandwidth Josephson circuits to interface the output of RSFQ circuits to room temperature electronics. The article describes techniques for amplifying RSFQ signal levels to voltage outputs in the 2 to 4 mV range. The driver described in the article consists of a low-voltage, low output impedance, SFQ/DC converter, a Josephson transmission line (JTL) current amplifier and a stack of DC superconducting quantum interference devices (SQUIDs).
Digital SQUIDs are discussed in the IEEE Transaction on Applied Superconductivity, Volume 1, No. 1, March 1991, in an article entitled “RSFQ Logic/Memory Family: A New Josephson-Junction Technology for Sub-Terahertz-Clock-Frequency Digital Systems”, by K. Likharev and V. Semenov.
U.S. Pat. No. 5,936,458 to Rylov, combines Josephson junction transmission lines and DC/SQUIDs into a superconducting amplifier.
3. Problems of the Prior Art
In order to transmit the digital information generated by and within these RSFQ circuits for processing by standard semiconductor circuits, several stages of amplification are needed to increase the amplitude of the pulses while maintaining high speed of operation without introducing noise and distortion.
In practice, when using a SQUID stack approach, there may be a large number (e.g. 50) of SQUIDs in each stack. The reason for stacking a large number of SQUIDs is that the resistance of a single SQUID when in the resistive state is in the range of one Ohm and the current through the SQUID is generally in the order of half (0.5) a milliampere. Thus, in order to produce signal voltages in the millivolt range it is necessary to have resistances in the range of 40 or 50 ohms. This can only be achieved by connecting a large number of SQUIDs in series.
Another problem is that the characteristics of the SQUIDs in the stack should be very similar, if not identical. This requires that the reproducibility of the devices be well controlled. The difficulty in making a large number of identical devices puts a limit on the number of SQUIDs that can be reliably fabricated for series connection. Another problem is that of controlling the responses of SQUIDs in a stack so that they are all driven to the superconductive state or to the resistive state at the same time. When a large number of SQUIDs are connected in series, this becomes very problematic since the control signals for setting or resetting the SQUIDs must be distributed over relatively large distances at the frequencies of interest. At the operating frequencies of interest, very small differences in the length of a wire can cause a significant difference in the time when one device response is compared to another (i.e., propagation delay of the control signals). Differences in the response time of the devices of a stack reduces the effective bandwidth of the circuit very significantly.
Further, the devices of the prior art have had a very limited bandwidth.